5 research outputs found

    Decoding of Non-Binary LDPC Codes Using the Information Bottleneck Method

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    Recently, a novel lookup table based decoding method for binary low-density parity-check codes has attracted considerable attention. In this approach, mutual-information maximizing lookup tables replace the conventional operations of the variable nodes and the check nodes in message passing decoding. Moreover, the exchanged messages are represented by integers with very small bit width. A machine learning framework termed the information bottleneck method is used to design the corresponding lookup tables. In this paper, we extend this decoding principle from binary to non-binary codes. This is not a straightforward extension, but requires a more sophisticated lookup table design to cope with the arithmetic in higher order Galois fields. Provided bit error rate simulations show that our proposed scheme outperforms the log-max decoding algorithm and operates close to sum-product decoding.Comment: This paper has been presented at IEEE International Conference on Communications (ICC'19) in Shangha

    Multi-Kernel Polar Codes versus Classical Designs with Different Rate-Matching Approaches

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    Polar codes, which have been proposed as a family of linear block codes, has garnered a lot of attention from the scientific community, owing to their low-complexity implementation and provably capacity-achieving capability. Thus, they have been proposed to be used for encoding information on the control channels in the upcoming 5G wireless networks. The basic approach introduced by Arikan in his landmark paper to polarize bit channels of equal capacities to those of unequal capacities can be used to design only codewords of length N=2n, which is a major limitation when codewords of different lengths are required for the underlying applications. In the predecessor paper, this aspect was partially addressed by using a 3×3 kernel circuit (used to generate codewords of length M=3m), along with downsizing techniques such as puncturing and shortening to asses the optimal design and resizing techniques based on the underlying system parameters. In this article, we extend this research to include the assessment of multi-kernel rate-matched polar codes for applicability over a much wider range of codeword lengths

    On the Effects of Kernel Configuration in Multi-Kernel Polar Codes

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    Polar codes are a relatively new family of linear block codes which have garnered a lot of attention from the scientific community, owing to their low-complexity implementation and provably capacity achieving capability. They have been proposed to be used for encoding information on the control channels in 5G wireless networks due to their robustness for short codeword lengths. The basic approach introduced by Arikan can only be used to generate polar codes of length N=2n, ∀n∈N. To overcome this limitation, polarization kernels of size larger than 2×2 (like 3×3, 4×4, and so on), have already been proposed in the literature. Additionally, kernels of different sizes can also be combined together to generate multi-kernel polar codes, further improving the flexibility of codeword lengths. These techniques undoubtedly improve the usability of polar codes for various practical implementations. However, with the availability of so many design options and parameters, designing polar codes that are optimally tuned to specific underlying system requirements becomes extremely challenging, since a variation in system parameters can result in a different choice of polarization kernel. This necessitates a structured design technique for optimal polarization circuits. We developed the DTS-parameter to quantify the best rate-matched polar codes. Thereafter, we developed and formalized a recursive technique to design polarization kernels of higher order from component smaller order. A scaled version of the DTS-parameter, namely SDTS-parameter (denoted by the symbol ζ in this article) was used for the analytical assessment of this construction technique and validated for single-kernel polar codes. In this paper, we aim to extend the analysis of the aforementioned SDTS parameter for multi-kernel polar codes and validate their applicability in this domain as well

    Bit-interleaved polar coded modulation with iterative decoding

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    Polar Codes are a recently proposed class of linear block error correction codes. They are provably capacity achieving codes over Binary Discrete Memoryless Channels (B-DMC) and have hence garnered a lot of interest from the scientific community. It is also a proposed channel coding method for 5G technology. Bit-Interleaved Coded Modulation with Iterative Decoding (BICM-ID) is a well known design to improve the error correcting performance of underlying channel codes over continuous channels especially Additive White Gaussian Noise (AWGN) channels. The novel idea in this paper, is to combine these powerful error correcting techniques i.e. integrate Polar Codes in a BICM-ID design to produce a high performance Bit-Interleaved Polar Coded Modulation with Iterative Decoding (BIPCM-ID) system. The error correcting performance of such a BIPCM-ID system has been analyzed through simulations over AWGN channel and multiple modulation schemes. Additionally error floor removal has been implemented and system performance has been discussed
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